EU’s Advanced Semiconductor Pilot Lines Target Sub-2nm and 7nm FD-SOI Processes

The European Chip Joint Undertaking announces pilot lines for sub-2nm SoC and 7nm FD-SOI processes, aiming to bridge lab to fab transitions.

The European Chip Joint Undertaking, established under the EU’s Chip Act, has successfully attracted approximately €11 billion in funding to revitalize the European semiconductor ecosystem.

This initiative has recently announced that four advanced semiconductor pilot lines have passed the preliminary review and are moving to the financial assessment stage, with official construction agreements expected later this year.

These pilot lines include:

  • A sub-2nm SoC pilot line at Belgium’s imec microelectronics research center.
  • An advanced FD-SOI process pilot line led by France’s CEA-Leti, aiming for a 7nm process.
  • A pilot line for wide-bandgap semiconductor materials led by Finland’s University of Tampere.
  • An advanced heterogeneous integration packaging pilot line led by Germany’s Fraunhofer Society.

These lines will play a crucial role in accelerating process development and testing concept validation products.

They aim to bridge the gap from laboratory settings to wafer fabrication facilities and will be accessible to a broad range of users including academia, industry, and research institutions.

The construction of these lines will be funded through EU and national grants and private donations.

Additionally, the European Chip Joint Undertaking is currently seeking proposals for a virtual design platform to further support innovation in the semiconductor industry.

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EU’s Advanced Semiconductor Pilot Lines Target Sub-2nm and 7nm FD-SOI Processes

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