Nvidia, AMD Book TSMC’s Advanced Packaging for AI Chips

Demand for AI chips leads Nvidia and AMD to secure TSMC’s advanced packaging capacities for the next two years.

Due to a high demand for AI chips, it’s reported that TSMC’s advanced packaging capacity for the next two years has already been fully booked by Nvidia and AMD.

The two companies, focusing on the high-performance computing market, have secured TSMC’s CoWoS and SoIC packaging capacities.

TSMC is optimistic about the future of AI applications. In April, during their earnings call, TSMC’s President adjusted the forecast for AI-related orders and revenue, extending the projection from 2027 to 2028.

TSMC anticipates that AI servers will double their revenue this year. They predict a 50% compound annual growth rate for AI servers over the next five years, which will account for more than 20% of TSMC’s revenue by 2028.

Major cloud service providers such as Amazon AWS, Microsoft, Google, and Meta are heavily investing in AI servers. Nvidia and AMD’s products are in high demand as they place substantial orders with TSMC to meet the vast demands of these cloud companies.

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To meet this immense demand, TSMC is actively expanding its advanced packaging capacities.

By the end of this year, TSMC’s monthly production capacity for CoWoS will reach 45,000 to 50,000 wafers, and SoIC is expected to hit 5,000 to 6,000 wafers, aiming to reach 10,000 wafers per month by the end of 2025.

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Nvidia’s primary H100 chip is produced using TSMC’s 4-nanometer process and utilizes the CoWoS advanced packaging, incorporating SK Hynix’s high-bandwidth memory (HBM) in a 2.5D packaging format.

AMD’s MI300 series, in contrast, is manufactured using TSMC’s 5-nanometer and 6-nanometer processes.

AMD initially uses TSMC’s SoIC for vertical stacking integration of CPU and GPU chips, followed by CoWoS advanced packaging with HBM.

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Nvidia, AMD Book TSMC’s Advanced Packaging for AI Chips

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